The present invention relates to a semiconductor device and a manufacturing method thereof, and in particular, relates to a semiconductor device equipped with a transistor.
It is known that, in a transistor such as a metal oxide semiconductor (MOS) transistor, mobility of electrons or holes is improved by applying a stress to a channel region. Mobility of electrons is improved in an n-type transistor by applying a tensile stress to a channel region and mobility of holes is improved in a p-type transistor by applying a compressive stress to a channel region.
A technology to cover the transistor with a silicon nitride film is available as a technology to provide a stress to the transistor. A tensile stress can be applied to a channel region of the MOS transistor covered by a silicon nitride film having a tensile stress. The silicon nitride film having a tensile stress is deposited by controlling film formation conditions in the formation process of the silicon nitride film to cause the deposited silicon nitride film to shrink. Also, a compressive stress can be applied to a channel region by depositing a silicon nitride film having a compressive stress. The silicon nitride film having a compressive stress is deposited by controlling film formation conditions in the formation process of the silicon nitride film to cause the deposited silicon nitride film to expand. Moreover, there is proposed a technology to form a silicon nitride film, which is a stress film, as an etching stopper film for forming a contact hole in an inter-layer insulating film after a gate electrode of a transistor is covered with the silicon nitride film and further the silicon nitride film is covered with the inter-layer insulating film.
For example, when a large scale integrated (LSI) circuit containing a circuit block having a specific function such as a phase locked loop (PLL) circuit is manufactured, it is necessary to evaluate performance of the circuit block alone in a development phase before the circuit block is incorporated into the LSI circuit to guarantee performance of the circuit block. It is also preferable to be able to guarantee almost the same performance even if a circuit block is applied to a different LSI circuit after being evaluated.
In a CMOS transistor equipped with an n-type MOS transistor and a p-type MOS transistor, a first silicon nitride film applying a tensile stress to a channel region may be formed in a formation region of the n-type transistor and a second silicon nitride film applying a compressive stress to a channel region may be formed in the formation region of the p-type transistor. In such a case, if the distance between edge portions of the first silicon nitride film and the second silicon nitride film and the channel region of the n-type MOS transistor and that of the p-type MOS transistor changes, magnitudes of stress applied to the channel region of the n-type MOS transistor and that of the p-type MOS transistor change. Due to the changes in magnitude of the stress, mobility of the n-type MOS transistor and the p-type MOS transistor changes, leading to fluctuations in performance of the CMOS transistor.